// ============= Verilog library extensions ===========
+libext+.v+.vlib

// ============= Verilog Module search path =============
-y ../rtl

../rtl/lpuart_basic_2stage_sync.sv
../rtl/lpuart_sync.sv

../rtl/lpuart_fifo.sv
../rtl/lpuart_basic_async_fifo.sv

../rtl/lpuart_pin_proc.sv
../rtl/lpuart_bclk_gen.sv
../rtl/lpuart_tx.sv
../rtl/lpuart_rx.sv

../rtl/lpuart_apb_biu.sv
../rtl/lpuart_regfile.sv

../rtl/lpuart_top.sv
